|LTE 2x2 Channel Estimator|
What he drew was a close match with the model we use in our own LTE Soft Modem reference design. However, ours is drawn with a UML based design tool (a UML Activity Diagram) rather like using an 'electronic whiteboard'. Here it is, over on the right:
The design intent is clear from the diagram: Four channel estimate ‘kernels’ are kicked off in parallel (in this case to process 2x2 Tx diversity) running on a number of Vector Signal Processors (VSPs). Sub-carrier buffers are provided by a previous symbol processing step (in another diagram) and the four channel estimator outputs are stored in output buffers, used by the subsequent symbol detection step. Each channel estimator has state held in a clearly defined, observable buffer object and is parameterised in operation by various parameter objects.
But - says the customer - I’ve only specified two VSPs in my design, is that sufficient? - Well, here's the cool thing; the System Design Tool (SDT) performs an analysis based on the specified platform definition. With two VSPs it has choices: run two parallel paths, each with two channel estimates in series; or run one path and run all four in series. You can decide yourself, but it’s more efficient to just let the tool work it out automatically. As long as you can meet timing deadlines either choice is valid. We run the tool, and look at the reports. There is plenty of time to run them all serially on one processor, so we just go ahead and build the code, run it on the SDM dev platform (which uses our 45nm development chip) and make some real power and timing measurements to confirm what the tool told us.
Ok - says the customer - but I've got a much more complex time interpolation algorithm I want to try, how do I do that? - Well that’s pretty easy; check the new kernel into the kernel database, so SDT can use it. Go to the diagram and select one of the channel estimation kernels; right click and select ‘replace’. SDT asks if I want to replace all instances - which I do - with the new complex version of the channel estimation kernel. I press the compile button to re-analyse and generate code. I build the code and it's running on silicon and we are measuring the power consumption impact for the new channel estimator in less than 20 minutes.
Now that is cool - says the customer!